Index: include/xplthread.h
===================================================================
--- include/xplthread.h	(revision 42)
+++ include/xplthread.h	(working copy)
@@ -49,8 +49,44 @@
 #define	XplSafeIncrement(Variable)    XplSafeAdd (Variable, 1)
 #define	XplSafeDecrement(Variable)    XplSafeAdd (Variable, -1)
 #define	XplSafeSub(Variable, Value)   XplSafeAdd (Variable, -(Value))
+
+#elif defined(__powerpc__)
+
+typedef struct { volatile int counter; } XplAtomic;
+
+/* Note: This is taken almost verbatim from kernel-land /usr/include/asm-ppc/atomic.h 
+ * Please also note the following:
+ *   Erratum #77 on the 405 means we need a sync or dcbt before every stwcx.
+ *   The old ATOMIC_SYNC_FIX covered some but not all of this.
+ *   "dcbt " #ra "," #rb ";" is always added to be on the safe side 
+ *   see /usr/include/asm-ppc/atomic.h for more details
+ *  
+ **/
+
+static __inline__ void _XplSafeAdd(int a, XplAtomic *v)
+{
+	int t;
+
+	__asm__ __volatile__(
+	"1:     lwarx   %0,0,%3 \n\
+		add     %0,%2,%0 \n\
+		dcbt   0,%3 \n"
+	"       stwcx.  %0,0,%3 \n\
+		bne-    1b"
+		: "=&r" (t), "=m" (v->counter)
+		: "r" (a), "r" (&v->counter), "m" (v->counter)
+		: "cc");
+}
+
+#define	XplSafeRead(Variable)         ((Variable).counter)
+#define	XplSafeWrite(Variable, Value) (Variable).counter = (Value)
+#define XplSafeAdd(Variable, Value)   _XplSafeAdd((Value), &(Variable))
+#define	XplSafeIncrement(Variable)    XplSafeAdd (Variable, 1)
+#define	XplSafeDecrement(Variable)    XplSafeAdd (Variable, -1)
+#define	XplSafeSub(Variable, Value)   XplSafeAdd (Variable, -(Value))
+
 #else
-# error "Safe variable operations not implemented on this platform"
+#error "Safe variable operations not implemented on this platform"
 #endif